Using Clos Switches in Area Efficient Asynchronous SDM Routers

Most of current asynchronous on-chip routers use the virtual channel flow control method which compromises throughput and latency. Instead of using virtual channels, an asynchronous spatial division multiplexing (SDM) router has been proposed recently. The major design overhead of an SDM router is the enlarged central switch which increases proportionally to the number of virtual circuits. Clos switches provide theoretically the optimal structure for high-radix switches. A novel 2-stage Clos switch is proposed and integrated into an SDM router. It is shown that the 2-stage Clos switch significantly reduce the area consumption of the central switch and the switch allocator. It is also found that SDM and the 2-stage Clos switch reduce power consumption.